›› 2019, Vol. 39 ›› Issue (1): 67-.doi: 10.16708/j.cnki.1000-758X.2018.0070

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A study on matrix error correction code for memory hardening

SHI Yugen, LI Shaofu,QI Yike   

  1. 1School of Information Technology,Southwest University of Science and Technology, Mianyang 621010,China 2Aerodynamic Noise Control Key Laboratory,China Aerodynamics Research and Development Center, Mianyang 621900,China
  • Online:2019-02-25 Published:2019-02-25

Abstract: In order to correct the multiple bit upsets (MBU) of high energy particles in the radiation environment, a matrix error correcting code circuit was proposed to strengthen the memory effectively. A method of rectangular cyclic parity was proposed to construct the parity bit, and the decode algorithm and the corresponding decoding circuit of correct code against MBU was proposed. The detection bit was constructed by parity bit. The order of the input of the data was arranged to ensure the error correcting code circuit worked normally when redundant bits flipped. In the 16bit data,the proposed matrix error correct code can correct MBU with 5 bit data. Compared with the current known error correction codes in the same conditions, the matrix error correction codes are obtained with higher mean time to failure (MTTF).

Key words: memory, radiation hardened, reliability, error correction code, matrix error correcting code, multiple bit upsets